資源描述:
《基于快速處理sar成像技術(shù)的的研究》由會(huì)員上傳分享,免費(fèi)在線(xiàn)閱讀,更多相關(guān)內(nèi)容在學(xué)術(shù)論文-天天文庫(kù)。
1、中文摘要摘要:隨著對(duì)合成孔徑雷達(dá)(SAR)成像質(zhì)量和實(shí)時(shí)性的要求越來(lái)越高,高性能SAR成像系統(tǒng)的設(shè)計(jì)顯得尤為重要。SAR實(shí)時(shí)成像處理系統(tǒng)大點(diǎn)數(shù)據(jù)的運(yùn)算量主要集中在距離向和方位向的壓縮處理上,而其核心是實(shí)現(xiàn)匹配濾波的快速傅立葉變換(FFT)運(yùn)算。常用的處理方案是采用并行高速DSP來(lái)完成大點(diǎn)FFT運(yùn)算,但需要算法分解和復(fù)雜的控制,而且在點(diǎn)數(shù)上也有很大局限性。隨著硬件技術(shù)的迅速發(fā)展,可編程器件FPGA已經(jīng)成為比DSP更優(yōu)越的壓縮處理方式,在體積、速度、靈活性等各種性能都優(yōu)于DSP。本設(shè)計(jì)基于新一代的FPGA平臺(tái),提出了一種高效可行的方案,設(shè)計(jì)出了高性能的FFT運(yùn)
2、算器。在FFT算法方面,對(duì)比各種快速算法,采用高效的基一4DIT算法;在實(shí)現(xiàn)框架方面,采用級(jí)聯(lián)流水線(xiàn)結(jié)構(gòu)和優(yōu)化設(shè)計(jì)的蝶形單元,并結(jié)合乒乓RAM,提高了運(yùn)算的并行度,而且方便擴(kuò)展,能適應(yīng)不同長(zhǎng)度的FFT;在數(shù)據(jù)精度方面,設(shè)計(jì)了塊浮點(diǎn)算法,在滿(mǎn)足系統(tǒng)指標(biāo)的基礎(chǔ)上解決了速度和精度的矛盾;在旋轉(zhuǎn)因子方面,則采用了全新的CORDIC算法動(dòng)態(tài)生成的方法,解決了旋轉(zhuǎn)因子查表法的不易擴(kuò)展和資源占用大的問(wèn)題??傊?,本設(shè)計(jì)基于新硬件平臺(tái)的豐富資源和FFT實(shí)現(xiàn)的優(yōu)化方案,在實(shí)時(shí)性、精度和資源占用上都達(dá)到了新的高度,并通過(guò)了功能驗(yàn)證,具有良好的應(yīng)用前景。關(guān)鍵詞:SAR成像;FPG
3、A;級(jí)聯(lián)流水線(xiàn);塊浮點(diǎn);CORDIC分類(lèi)號(hào):TN957.51+3ABSTRACTABSTRACT:Asthehigherrequestofthesyntheticapertureradar(SAR)imagequality,thedesignofhighperformancereal—timeprocessingsystembecomemoreandmoreimportant.ThedatavolumeandhugecomputationtaskofSARisconcentrateonrangeandazimuthcompression卜—.thebasi
4、ccomputationofwhichisFFT.Theusualmeasureofcompressionisusingparallelhi29hspeedDSPs,whichwasconsideredasthebestwayofreal—timeSARprocessinginhardware,butitshouldusedistributedalgorithmandcomplicatedcontrol,furthermore,itjustcallbeapplicableforthesmallpointsFFT.Theprogrammablechips·F
5、PGAtechniqueisimprovingSOfastthatithasbecomeabetterwaytorealizecompressionthanDSEThisdissertationdiscussedaveryeffectiveblueprintanddesignedahighperformanceFFTprocessorbasedonthenewplatform.1nhedesignadoptsthemoreeffectivealgorithmofradix·4anddecimation-in-time(DIT)comparedwithoth
6、erfastfouriertransformalgorithm.Inthecourseofrealization,thepipelinestructure,symmetricDual·RAMandoptimumparalleloperationbutterflyareadopted,whichcanmakebutterflyofeverystagecomputeatthesametime,andmakethemoduleextendeasily.Intheaspectofdataprecision,theblockfloatpointarithmetico
7、perationsareadoptedtobalancethecontradictorybetweenthespeedandprecision.Especially,theCORDICalgorithmisusedtomaketwiddlefactordynamically,whichdon’tneedlargenumbersofROMutilizationsforthecomplicatedandinextensibleway—一Look-UpTable(LUT).Inaword,thisdesignhadbeenuptoanewlevelinthesi
8、gnificantfactorsofreal-time,preci