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《zigbee無線傳感器網(wǎng)絡(luò)節(jié)點(diǎn)關(guān)鍵技術(shù)的研究》由會(huì)員上傳分享,免費(fèi)在線閱讀,更多相關(guān)內(nèi)容在學(xué)術(shù)論文-天天文庫。
1、碩士論文摘要本論文以ZigBee無線傳感器網(wǎng)絡(luò)節(jié)點(diǎn)為研究對象,針對監(jiān)測節(jié)點(diǎn)和網(wǎng)關(guān)節(jié)點(diǎn)工作的特點(diǎn),對主要的關(guān)鍵技術(shù)進(jìn)行研究。首先,設(shè)計(jì)一款能夠工作在2.4GHz的zigBee無線傳感器網(wǎng)絡(luò)節(jié)點(diǎn)的微帶天線。根據(jù)節(jié)點(diǎn)天線設(shè)計(jì)的方法,對印刷偶極子天線進(jìn)行小型化設(shè)計(jì),并用ADS2009電磁仿真軟件對天線小型化前后進(jìn)行仿真。仿真結(jié)果表明,小型化后的天線有效面積減小39%,節(jié)點(diǎn)的體積得到大大的減小。其次,對網(wǎng)關(guān)節(jié)點(diǎn)PCB的信號完整性問題進(jìn)行研究。根據(jù)傳輸線理論和特性,分析反射和串?dāng)_形成機(jī)理,對PCB手工布線前的反射和串?dāng)_進(jìn)行仿真,提出改進(jìn)措施,制定相應(yīng)的PCB設(shè)
2、計(jì)規(guī)則,對PCB手工布線后進(jìn)行仿真驗(yàn)證。仿真結(jié)果表明,根據(jù)手工布線前仿真結(jié)果制定的設(shè)計(jì)規(guī)則繪制出的PCB圖反射和串?dāng)_都較小。再次,研究網(wǎng)關(guān)節(jié)點(diǎn)的PCB電磁兼容性。根據(jù)電磁兼容基礎(chǔ)理論,對PCB中電磁干擾進(jìn)行分析,對PCB手工布線前的電磁兼容性進(jìn)行仿真預(yù)測,對PCB手工布線后的電磁兼容性進(jìn)行仿真驗(yàn)證。仿真結(jié)果表明,根據(jù)仿真預(yù)測的結(jié)果,繪制出的PCB能夠較好的滿足電磁兼容性。最后,根據(jù)監(jiān)測節(jié)點(diǎn)和網(wǎng)關(guān)節(jié)點(diǎn)的工作原理,提出監(jiān)測節(jié)點(diǎn)和網(wǎng)關(guān)節(jié)點(diǎn)的整體設(shè)計(jì)方案和硬件結(jié)構(gòu)組成,分別對監(jiān)測節(jié)點(diǎn)和網(wǎng)關(guān)節(jié)點(diǎn)的各個(gè)功能模塊進(jìn)行設(shè)計(jì)。編寫監(jiān)測節(jié)點(diǎn)和網(wǎng)關(guān)節(jié)點(diǎn)相應(yīng)的接口驅(qū)動(dòng)程序
3、,對節(jié)點(diǎn)硬件進(jìn)行調(diào)試,并介紹節(jié)點(diǎn)的硬件制作過程。綜上所述,對于ZigBee無線傳感器網(wǎng)絡(luò)關(guān)鍵技術(shù)研究結(jié)果表明,以上所做的工作具有一定的應(yīng)用價(jià)值和參考意義。關(guān)鍵詞:監(jiān)測節(jié)點(diǎn),網(wǎng)關(guān)節(jié)點(diǎn),天線設(shè)計(jì),信號完整性,電磁兼容性,硬件制作碩士論文AbstractIn“spaper'tal【ingmeZigBeeWhlessSensorNe似orkaStheresearchsubject,focusesonⅡleresearchofmem句orkeytecllllologybaSedontllecharacteristicsofgatewaynodeandmoni
4、tornode.Firstofall,t11ispaperdesi母:lsamicrostripamermaWIlichcanworl(in也e2.4GHz.Accordingtot11edesi印memodofnodeanteIlIla’thispaperputsfo刪ardp血terdipole觚te衄ades咖ofWsNnodeworkjngint11e2.4GHza11dmal【es塒nterdipoleante皿amirlimize.WitlltllehelpofADS2009elec們magnetismsimulationso?、鬭re
5、,廿1esimulationresultsaIldaIlanalysishaVebeengiVenbeforeaIldmerdesi印ofa11tellIlaminiaturization.111esim試ationresultsshowtllatthee虢ctiVeareaofanteImisreducedby39%,aIldtheWSNnodesizebecomesmuchsmaller.Secondly;studyof恤si印alintegrit),ofgatewaynodePCB.Amalysistllefomationmecha_Ilis
6、mofrenection鋤dcrosstalkaccordillgtot11et11eo巧aIldcharacteristicsof吣InissionliIle.SiIIlulatetllerenectiona11dcrosstaⅡ(ofbeforeroutingPCB.Putfo刑ardtlleimproVementmeasures鋤dfomulatet11ereleVantmlesofPCBdesi盟.Veri匆meafterroutingPCB.Thesimulationresultshowstllattherenectiona11dcros
7、stalkofPCBw11ich捌ngaccordingtotlledesi印mlesfIo冊ulatedinbef.oreroutingsimulationisVer巧small.眥rdly,smdyoftheelec仃0m則ticcompatibil時(shí)ofgatewaynodes’sPCB.Analysistlleelec仃omagneticinterferenceofPCBbaSedonnlebaSic觚d鋤e刪也eo巧ofelec臼omagneticcompatibility.Simulateandpredicttlleelectromag
8、neticcompatibili夠ofbeforeroutiIlgPCBa11dVeri矽tlleelectromagne