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1、CycloneFPGAFamily?March2003,ver.1.1DataSheetIntroductionTheCycloneTMfieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-mm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandad
2、edicateddoubledatarate(DDR)interfacetomeetDDRSDRAMandfastcycleRAM(FCRAM)memoryPreliminaryrequirements,Cyclonedevicesareacost-effectivesolutionfordata-pathapplications.CyclonedevicessupportvariousI/Ostandards,includingInformationLVDSatdataratesupto311megabitspersecond(
3、Mbps)and66-MHz,32-bitperipheralcomponentinterconnect(PCI),forinterfacingwithandsupportingASSPandASICdevices.Alteraalsooffersnewlow-costserialconfigurationdevicestoconfigureCyclonedevices.Features...■2,910to20,060LEs,seeTable1■Upto294,912RAMbits(36,864bytes)■Supportsco
4、nfigurationthroughlow-costserialconfigurationdevice■SupportforLVTTL,LVCMOS,SSTL-2,andSSTL-3I/Ostandards■Supportfor66-MHz,32-bitPCIstandard■Lowspeed(311Mbps)LVDSI/Osupport■UptotwoPLLsperdeviceprovideclockmultiplicationandphaseshifting■Uptoeightglobalclocklineswithsixcl
5、ockresourcesavailableperlogicarrayblock(LAB)row■Supportforexternalmemory,includingDDRSDRAM(133MHz),FCRAM,andsingledatarate(SDR)SDRAM■Supportformultipleintellectualproperty(IP)cores,includingAlteraaMegaCoreafunctionsandAlteraMegafunctionsPartnersProgram(AMPPSM)megafunc
6、tionsTable1.CycloneDeviceFeaturesFeatureEP1C3EP1C4EP1C6EP1C12EP1C20LEs2,9104,0005,98012,06020,060M4KRAMblocks(128′36bits)1317205264TotalRAMbits59,90478,33692,160239,616294,912PLLs12222MaximumuserI/Opins(1)104301185249301NotetoTable1:(1)Thisparameterincludesglobalclock
7、pins.AlteraCorporation1DS-CYCLONE-1.1CycloneFPGAFamilyDataSheetPreliminaryInformationCyclonedevicesareavailableinquadflatpack(QFP)andspace-savingFineLineBGAapackages(seeTables2through3).Table2.CyclonePackageOptions&I/OPinCountsDevice100-Pin144-Pin240-Pin256-Pin324-Pin
8、400-PinTQFP(1)TQFP(1),(2)PQFP(1)FineLineFineLineFineLineBGABGABGAEP1C365104EP1C4249301EP1C698185185EP1C12173185249EP1C202333
