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1、libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitydianzzisport(clk,clrm,stop:instd_logic;----時(shí)鐘/清零信號(hào)secm1,secm0:outstd_logic_vector(3downto0);----秒高位/低位co:outstd_logic);-------輸出/進(jìn)位信號(hào)enddianzz;architectureSECofdianzzissignalclk1,DOUT2:std_logic;beginproc
2、ess(clk,clrm)variablecnt1,cnt0:std_logic_vector(3downto0);---計(jì)數(shù)VARIABLECOUNT2:INTEGERRANGE0TO10;beginIFCLK'EVENTANDCLK='1'THENIFCOUNT2>=0ANDCOUNT2<10THENCOUNT2:=COUNT2+1;ELSECOUNT2:=0;DOUT2<=NOTDOUT2;ENDIF;ENDIF;ifclrm='1'then----當(dāng)clr為1時(shí),高低位均為0cnt1:="0000";cnt0:="0000";elsifclk'e
3、ventandclk='1'thenifstop='1'thencnt0:=cnt0;cnt1:=cnt1;endif;ifcnt1="1001"andcnt0="1000"then----當(dāng)記數(shù)為98(實(shí)際是經(jīng)過(guò)59個(gè)記時(shí)脈沖)co<='1';----進(jìn)位cnt0:="1001";----低位為9elsifcnt0<"1001"then----小于9時(shí)cnt0:=cnt0+1;----計(jì)數(shù)--elsifcnt0="1001"then--clk1<=notclk1;elsecnt0:="0000";ifcnt1<"1001"then----高位小于9時(shí)c
4、nt1:=cnt1+1;elsecnt1:="0000";co<='0';endif;endif;endif;secm1<=cnt1;secm0<=cnt0;endprocess;endSEC;libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitySECONDisport(clk,clr:instd_logic;----時(shí)鐘/清零信號(hào)sec1,sec0:outstd_logic_vector(3downto0);----秒高位/低位co:outstd_log
5、ic);-------輸出/進(jìn)位信號(hào)endSECOND;architectureSECofSECONDisbeginprocess(clk,clr)variablecnt1,cnt0:std_logic_vector(3downto0);---計(jì)數(shù)beginifclr='1'then----當(dāng)ckr為1時(shí),高低位均為0cnt1:="0000";cnt0:="0000";elsifclk'eventandclk='1'thenifcnt1="0101"andcnt0="1000"then----當(dāng)記數(shù)為58(實(shí)際是經(jīng)過(guò)59個(gè)記時(shí)脈沖)co<='1';---
6、-進(jìn)位cnt0:="1001";----低位為9elsifcnt0<"1001"then----小于9時(shí)cnt0:=cnt0+1;----計(jì)數(shù)elsecnt0:="0000";ifcnt1<"0101"then----高位小于5時(shí)cnt1:=cnt1+1;elsecnt1:="0000";co<='0';endif;endif;endif;sec1<=cnt1;sec0<=cnt0;endprocess;endSEC;libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all
7、;entityMINUTEisport(clk,en:instd_logic;min1,min0:outstd_logic_vector(3downto0);co:outstd_logic);endMINUTE;architectureMINofMINUTEisbeginprocess(clk)variablecnt1,cnt0:std_logic_vector(3downto0);beginifclk'eventandclk='1'thenifen='1'thenifcnt1="0101"andcnt0="1000"thenco<='1';cnt0:=
8、"1001";elsifcnt0<"1001"thencnt0:=cnt0+1;